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Address: http://www.europar2010.org/en/topicquattro.php
Title: Europar 2010 MEETING - Ischia - Naples, Italy  •  Size: 22885

Europar 2010 MEETING - Ischia - Naples, Italy

4. High Performance Architectures and Compilers

Description
   This topic deals with architecture design and compilation for high performance systems. The areas of interest range from microprocessors to large-scale parallel machines (including multi-core, possibly heterogeneous, architectures); from general-purpose platforms to specialized hardware (e.g., graphic coprocessors, low-power embedded systems); and from hardware design to compiler technology.
   On the compilation side, topics of interest include programmer productivity issues, concurrent and/or sequential language aspects, program analysis, program transformation, automatic discovery and/or management of parallelism at all levels, and the interaction between the compiler and the rest of the system.
   On the architecture side, the scope spans system architectures, processor micro-architecture, memory hierarchy, and multi-threading, and the impact of emerging trends.

Focus
* Compiling for multithreaded/multi-core and heterogeneous  processors /
   architectures
* Compiling for emerging architectures (low-power embedded systems,
   reconfigurable hardware, processors in memory, graphics coprocessors)
* Iterative, just-in-time, feedback-oriented, dynamic, and machine learning-based
   compilation
* Static analysis and interaction between static and dynamic analysis
* Programmer productivity tools and analysis for high-performance architectures
* Program transformation systems
* High level programming models and tools for multi/many core and heterogeneous
   architectures
* Interaction between compiler, runtime system, hardware, and operating system
* Parallel computer architecture design - ILP, multi-threaded, and multi-core
   processors
* Power-performance efficient designs
* Software and hardware fault-tolerance techniques in large-scale parallel machines
* Memory hierarchy
* Application-specific, reconfigurable and embedded parallel systems

Topic Committee

Global chair        
Pedro Diniz IST/UTL/INESC-ID, Portugal 

Local chair
Marco Danelutto University of Pisa, Italy 

Members
Denis Barthou University of Versailles, France 
Marc Gonzalez Tallada  Polytechnic University of Catalonia, Spain
Michael Huebner Karlsruhe Institute of Technology, Germany


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